SDK release notes

1.3.1 Firmware

• Supports installation from binary packages (RPM or DEB).

• Supports dynamic power management. By default, the PPU firmware dynamically adjusts the core frequency (from 200 MHz to the maximum operating frequency) and operating voltage based on real-time workload, temperature, and power consumption.

• Supports PPU frequency locking. For details, see PPU-SMI Device Management Tool.

• Supports secure firmware signing and a dual-backup feature to ensure firmware security and reliability.

• Supports firmware upgrades for the power management integrated circuit (PMIC).

• Supports out-of-band management through the Baseboard Management Controller (BMC), including device status monitoring and out-of-band firmware upgrades.

1.3.2 Kernel driver

• Supports two installation methods: binary packages (RPM or DEB) and runfile packages.

• Supports decoupling the kernel driver from the PPU SDK, allowing any combination of kernel driver and PPU SDK versions v1.0 or later.

• Supports flexible machine configurations, including single-node single-card; single-node 8-card/16-card (ICN interconnect); multi-node, multi-card (ICN interconnect); and multi-node, multi-card (GDR). Before using GDR, ensure the alixpu-peermem kernel module, which is released with the PPU kernel driver, is installed.

• Supports PPU fault reporting and handling.

• Supports the auto-reset feature. The driver automatically resets the PPU device when it detects a kill overtime or cp invalid cmd error, enabling automatic recovery. This feature is enabled by default. Use ppu-smi to check the status or disable it.

• Supports Multi-Pipe Service (MPS). Run ppudbg --config_submit_mode 1/0 to enable or disable this feature.

• Supports tidal mode for workloads that mix small-model and large-model tasks in MPS mode.

• Supports NVML GPM metric collection, including SM utilization, SM occupancy, tensor core utilization, memory bandwidth utilization, PCIe read/write speeds, and ICN link read/write speeds.

• Supports full-card passthrough virtualization. You can unbind the PPU driver on the host and pass the card through to a virtual machine. When using this feature, ensure ICN is isolated between different virtual machines.

• Supports hot upgrades of the host driver in SR-IOV virtualization mode. This feature lets you update the PPU driver on the host while services are running in the virtual machines.

• Supports single-node 16-card Zhenwu 810E configurations and optimizes the default PPU device order (sorted by rear-panel ID).

• Supports GPM collection for L1/L2 cache hit rates, which can be queried using the DCGM tool.

• Adjusts the logical numbering rule for 16-card Zhenwu 810E devices to improve interconnect performance.

• Supports querying the MPS tidal mode status.

• Supports querying Xid error information.

• Supports querying the GPM status and enabling or disabling GPM.

• Disables HBM parity Xid error reporting.

1.3.3 User-mode driver and runtime

• Compatible with most CUDA runtime APIs (cudaXXX) and CUDA driver APIs (cuXXX).

• Outputs more detailed error logs when an Xid 896 error occurs to facilitate troubleshooting.

• Optimizes performance for 2D/3D cudaMemcpy and cudaMemset operations.

• Supports Stream Memory Operation v2 APIs.

• Supports APIs related to edge data in graph management.

• Supports APIs related to batch memory operation nodes in graph management.

• Supports basic texture features.

• Optimizes PPU performance when CUDA_DEVICE_MAX_CONNECTIONS=1.

• Supports the cuCtxCreate_v3 API.

• Ensures that printf content from device code is correctly output after an exception occurs.

• Supports the HGGC_EXCLUSIVE_STREAMS environment variable to map stream groups to different hardware queues.

• Fixes an issue where CUDA Graph did not support cooperative kernel nodes.

• Supports the cudaLaunchKernelExC interface.

• Supports collecting hardware channel information for streams using the asys tool.

• Supports AD extension APIs.

• Fixes a cudaErrorIllegalAddress error that occurred when cudaCreateTextureObject was called while Colmap was running.

• Fixes an issue where the cudaMallocAsync interface returned an error when allocating a size of 0.

1.3.4 Compiler

• Provides a C/C++ extension language compiler based on the Clang/LLVM framework for the PPU architecture that supports a host/device mixed programming style and is fully compatible with the CUDA C/C++ language specification.

• Provides a rich set of compilation modules, allowing developers to flexibly build compilation pipelines through API calls and easily integrate JIT compilation capabilities.

• Implements support for inline PTX instructions, with partial support for dense MMA, sparse MMA, and texture-related instructions. It also extends the PTX instruction definition for PPU tensor cores.

• Implements support for CUDA device APIs, with this release adding support for some texture-related APIs.

• Supports the system-level reserved shared memory feature.

• Supports GCC host compiler versions from 5.5 to 14.2 and Clang host compiler versions from 9 to 18.

• Supports Triton versions 2.3.x, 3.0.x, 3.1.x, 3.2.x, and 3.3.x. Extends the triton.lang syntax to include support for AIU.

• The split section option is enabled by default for the device ELF binary format, reducing runtime module loading overhead.

• Provides a rich set of libraries and tools to simplify development and debugging: hgobjdump, memcheck, ppu-gdb, sanitizer library, hgprune, hgfatbin, hglink, and hgJitlink.

  • Updates to the hgrtc runtime JIT compilation library:

    • Supports caching of compilation artifacts to reduce JIT compilation time.

  • Provides PPU-GDB, a debugging tool that allows you to debug both GPU and CPU code within the same application.

  • Provides PPU Memcheck, a tool suite for functional correctness checking. This suite includes memcheck, initcheck, synccheck, and racecheck.

  • Provides hgobjdump, a PPU binary tool for extracting device-related information from binaries.

  • Provides hgprune, a PPU prune tool for extracting device-related information from binaries.

  • Provides hgfatbin, a PPU fatbin development library that supports various runtime operations on fatbin files.

  • Provides hglink, a PPU link tool for linking PPU device code.

  • Provides hgjitlink, a PPU JITLink development library that supports runtime linking of PPU device code.

1.3.5 Acceleration libraries

Compute acceleration libraries

• Supported closed-source compute libraries: acdnn, acblas, acfft, acsolver, acrand.

  • Operators supported by acdnn:

    Conv	BatchNorm	Pooling	Softmax
    Activation	CTCLoss	Dropout	LRN
    LSTM	GRU	MultiHeadAttn	Tensor Ops
    SpatialTransform	Backend fusion

  • Operators supported by acblas:

    Level 1 Ops	Gemv	Gemm	Matmul + epilogue
    MatrixTransform	trsm	getrfBatched	getrsBatched
    geqrfBatched	gelsBatched

  • acfft: Supports R2C/C2R/C2C/D2Z/Z2Z + FFT/iFFT transforms.

  • acsolver: Supports LU factorization/solve, Cholesky factorization/solve, QR factorization, SVD, and eigenvalue decomposition.

  • acrand supports:

    • Pseudo-random number generators: XORWOW, MRG32K3A, and PHILOX4_32_10.

    • Data distributions: Default, Uniform, Normal, and LogNormal.

• The acext quantization library supports:

  • A16W8/A16W4 kernel variants, including PerChannel and GroupWise.

  • A8W8 kernel variants, including PerChannel and PerToken.

  • An accelerated kernel for WeightonlyBatchedGemv with small batch sizes.

  • The following MoE types: FP16/BF16, and a8w8 PerChannel/PerToken.

• Supported open-source projects:

  • PPU FlashMLA v1.5

  • PPU FlashAttention 2.4.2/2.5.6/2.5.7/2.7.2/2.7.4.post1

  • PPU cutlass 2.5

  • PPU cutlass 3.3/3.4/3.6

  • PPU Xformers 0.0.22/0.0.25/0.0.27/0.0.29.post1/0.0.30

  • PPU FasterTransformer

  • PPU extension library acext:

    • Provides high-performance implementations for a16w8, a16w4, and a8w8 quantization, group-gemm, MoE, and batch gemv.

    • Available as a PPU SDK library and an open-source repository for integration with various frameworks and applications.

  • PPU DeepGemm:

    • Supports dense gemm and group gemm.

    • Supports FP16 and A8W8 formats, but does not support FP8.

    • Supports PerChannel and PerToken quantization, but does not currently support BlockWise quantization.

• Key updates:

  • Adds initial support for DeepGemm, achieving performance comparable to competitors in typical EP scenarios.

  • Optimizes MoE performance for scenarios such as DPSK and Qwen3, improving performance by over 50% on average compared to the Triton version.

  • blaslt: Enhances cross-version descriptor support and improves communication-computation parallelization.

  • conv: Improves support for different format combinations and adds support for strided channels.

  • solver: Adds support for gesvda.

  • Improves error handling for Driver/Runtime calls within compute libraries.

  • Optimizes deconv performance, increasing performance by up to 40% in some scenarios.

  • Optimizes LSTM performance, increasing performance by up to 30% in some scenarios.

Interconnect acceleration libraries

• PCCL:

  • Compatible with most NCCL APIs (ncclXXX) and environment variables.

  • Supports standard collective operations, such as AllReduce, AllGather, ReduceScatter, Broadcast, Reduce, Send, and Recv.

  • Supports intra-node multi-card communication via ICN, PCIe, and shared memory.

  • Supports inter-node communication via RDMA (GDR & non-GDR), Sockets, and ICN.

  • Performance optimizations:

    • Improves the performance of allreduce, reducescatter, and allgather operations on single-node 16-card Zhenwu 810E configurations, with a 10% to 20% improvement for large data sizes.

    • Optimizes allreduce performance for medium-sized data on single-node 4/8/16-card configurations, with improvements ranging from 10% to 60%.

  • Supports setting different algorithms and protocols for each collective operation.

  • Supports the NCCL_IB_SPLIT_DATA_ON_QPS feature.

  • Supports more CPU vendors and applies corresponding optimizations for PHB and SYS bandwidth.

  • Fixed a hang in ext-kernel that occurred when input/output buffer alignment was inconsistent across different ranks.

  • pccl tools:

    • pccl perf:

      • Supports AllReduce, AllGather, ReduceScatter, AlltoAll, Broadcast, and Reduce.

    • Enhancements to the p2pBandwidthAndLatencyPerf tool:

      • Evaluates ICN P2P interconnect bandwidth and latency for products like Zhenwu 810E on servers with various multi-card interconnect topologies.

    • DeviceOrderSearch tool:

      • Finds the optimal visible device order on Zhenwu 810E machines for Megatron framework training tasks based on the parallel training configuration. For usage instructions, see the linked documentation.

    • pccl check tools:

      • Performs functional readiness checks for products like Zhenwu 810E in multi-card and multi-node scenarios.

• sailSHMEM:

  • Compatible with all nvshmem point-to-point (pt2pt) related APIs.

  • Supports pt2pt operations for PPU cards for both intra-node and inter-node communication, including thread-, warp-, and block-level put/get bandwidth tests, latency tests, and synchronous operations such as signal and wait.

  • Supports ICN Link P2P, RDMA IBRC, and IBGDA network transfers.

  • Added support for the data combine feature on shmem_p_bw and shmem_p_lat paths, improving performance by about 1 to 3 times.

• DeepEP:

  • Compatible with most DeepEP Python APIs.

  • Supports three types of kernel implementations: intranode for dispatch and combine, internode, and internode low latency.

  • Supports communication through transport methods such as icn link and inter-node RDMA ibgda or ibrc.

  • Support for int8 groupwise and channelwise quantization implementation using low latency kernels;

  • Supports intranode and low latency kernel instances with 2 & 4 ranks.

  • Fixed potential race conditions on some internode kernel paths.

  • Fixed an issue with the release order for some resources that caused crashes.

1.3.6 Video/image codec hardware acceleration

Compatible with the NVIDIA Video Codec SDK, including cuvid decode, nvenc (up to v13.0), and nvjpeg (up to v12.4). Also compatible with NPP interfaces (up to v12.9). This enables direct support for hardware codec acceleration in higher-level frameworks such as FFmpeg (up to v7.1.1), OpenCV4, DALI (up to v1.44), PyAV, and TorchCodec.

Video decode

• Supports the NVIDIA cuvid decoder.

• Codecs:

  • HEVC (H.265) - ITU-T Rec. H.265 (04/2013), ISO/IEC 23008-2

    • Main Profile, Level 5.1, High Tier

    • Main10 Profile, Level 5.1, High Tier

    • Main Still Profile

  • VP9 - vp9-bitstream-specification-v0.6-20160331-draft

    • Profile 0, 8-bit

    • Profile 2, 10-bit

  • AVC (H.264) - ITU-T Rec. H.264 (03/2010) / ISO/IEC 14496-10

    • Main Profile, levels 1 - 5.2

    • High Profile, levels 1 - 5.2

    • High 10 Profile, levels 1 - 5.2

    • Baseline Profile, levels 1 - 5.2

  • AV1 Bitstream & Decoding Process Specification Version 1.0.0 with Errata 1

    • Main Profile, Level 5.1

  • AVS2

• Resolution up to 8192×8192

• Up to 192 FHD streams

Video encode

• Supports nvenc.

• Codecs:

  • AVC (H.264): Spec Version 12:ISO/IEC 14496-10 / ITU-T Rec. H.264 (03/2010)

    • Baseline Profile, levels 1 - 5.2

    • Main Profile, levels 1 - 5.2

    • High Profile, levels 1 - 5.2

    • High 10 Profile, levels 1 - 5.2

  • HEVC (H.265): ITU-T Rec. H.265 (04/2013), ISO/IEC 23008-2

    • Main Profile, Level 5.1, High Tier

    • Main10 profile, Level 5.1, High Tier

    • Main Still Profile

  • AV1 Bitstream Specification Version 1.0.0 with Errata 1

    • Main Profile, Level 5.1

• Supports resolutions up to 4K.

• Supports input RGB format (converted to YUV420 via inlinePP).

• Supports crop, scale, and rotate with inlinePP.

• Up to 32 FHD streams

JPEG:

• Supports nvjpeg decoder & encoder.

• Resolution up to 32K×32K

• Supports RGB format input and output with inlinePP.

• Supports crop, scale, and rotate with inlinePP.

• Up to 960 FPS for UHD

Image processing:

• Supports NVIDIA 2D Image NPP.

1.3.7 Software tools

• The following PPU management tools and libraries are available for cloud-scale monitoring and integration into operational systems:

  • PPU device management tool ppu-smi (similar to nvidia-smi). For details, see PPU-SMI Device Management Tool.

  • New features in ppu-smi v1.3:

    • Supports querying the HBM manufacturer.

    • Supports setting and querying the drain state.

    • Supports querying the rear-panel ID.

    • Allows the topo subcommand to filter and group the topology diagram by rear-panel ID.

    • Allows the topo subcommand to display RDMA NIC information in the topology diagram.

  • New features in ppu-smi v1.4:

    • Supports querying XID error codes.

    • Supports querying performance counter status.

    • Adds gpm subcommand to query and set GPM.

    • Supports querying tidal mode.

    • Supports querying product architecture and minor number.

    • Supports setting and querying MPS mode.

  • New features in ppu-smi v1.5:

    • Updates known issues.

    • Supports querying version information of SDK components.

  • Data center management and monitoring tool PPU DCGM (similar to NVIDIA DCGM). For details, see DCGM Management and Monitoring Tool.

  • New features in DCGM v1.3:

    • Supports field IDs related to cache hit rates.

    • Supports field IDs for Tensor Core utilization.

  • The main new features in DCGM v1.4 include:

    • Added support for field IDs for ICN per-link transmit and receive rates.

    • Updated the field ID support list.

  • New features in DCGM v1.5 include:

    • Instructions for using DCGM in a Docker environment.

  • Enhancements in DCGM v1.6 include:

    • Support for field IDs related to integer compute pipe utilization.

  • hgml (similar to NVIDIA nvml).

• Provides the PPU performance analysis tools Asight Systems and Asight Compute (similar to NVIDIA Nsight Systems and Nsight Compute) for analyzing single-node, multi-node, training, and inference performance.

  • Asight Systems is a low-overhead, system-level performance analysis tool. It collects system events, CPU and PPU activities, API execution times, call stacks, NVTX ranges, and CPU/PPU activity correlations, and presents them in a unified Timeline View. Developers can use the Timeline View to analyze CPU/PPU workloads, identify performance bottlenecks, and maximize parallelism. For details, see Asight Systems Application Performance Analysis Suite.

  • New features in Asight Systems v1.3:

    • Supports Python Functions Trace to profile specified Python functions without modifying user code.

    • Supports collecting application log output and tracking device memory allocation failures.

    • Adds Expert System and Statistics System with 15 analysis rules.

      • asys stats supports duration statistics and trace export for HGGC APIs, OSRT APIs, HGTX ranges, and HGGC kernels.

      • asys stats correlates HGTX and PPU-side traces to output statistical reports and export correlated data.

    • Timeline View enhancements:

      • Displays HGGC Launch APIs in the Timeline View by the names of the kernels they launch.

      • The Timeline View supports the display of the blocking property for user-created streams.

      • Timeline View now supports the WASD shortcut keys for zooming and panning. A prompt now notifies you if an inaccurate acu command is generated when you right-click a timeline item of the kernel type.

      • Function tables, such as the Top-Down View, support searching by module name.

    • Advanced Open feature supports more event types (PCCL, Log, Backtrace, NIC metrics).

  • New features in Asight Systems v1.4:

    • Improves UI styling and layout, with more tab styles available. Supports closing report tabs while a report is loading.

    • asys enhancements: The tool now supports specifying the CPU and Python profiling call stack depth. The tool can collect trace data for a subset of application processes and basic PPU information such as frequency and temperature. It also supports a shorter sampling period for CPU call stack information. The asys stats command supports HGGC kernel grid and block statistics, trace export, and both HGGC and memory Python backtrace call stack collection. The asys Python Functions Trace feature supports collecting all threads under a Python process.

    • The Timeline View is enhanced. It now supports custom HGTX colors and updates the time percentage of PPU nodes after filtering. The view can display RDMA network card metrics, PPU Activity dependencies, and HGGC Graph information independently. You can also mark timelines and show different types of video timelines in different colors. The HGGC Launch API is now displayed by kernel name. Additionally, the Events View adds a tile mode and improves search history autofill. The Function View adds flame graphs and icicle graphs. The HGTX range summary now supports specifying process and thread lists.

  • New features in Asight Systems v1.5:

    • asys stats supports HGTX PPU projection summary statistics.

    • asys stats supports statistics on tracked data volume and time consumption for HGGC PPU memory.

    • The asys stats subcommand now supports adding an HGTX range prefix for PPU kernel statistics.

    • The asys stats subcommand's HGTX Range Summary supports filtering by process.

    • The PPU tracking and statistics feature of the asys stats subcommand supports specifying a list of PPU devices.

    • The asys stats subcommand supports two viewing modes for Device Memory Usage Details and four for Device Memory Usage Summary.

    • The asys analyze subcommand supports a selection mode to specify a time range for PPU time utilization analysis.

    • Simplified the description for the asys expert and statistics systems and added a link to the documentation.

    • asys supports limiting the generated report file size.

    • asys supports collecting device and pinned memory usage via the --hggc-memory-usage option.

    • Supports monitoring the usage of dynamically allocated memory on the CPU side, including memory leak analysis, memory usage statistics, and allocation count statistics.

    • Supports collecting compute resource information associated with an HGGC context when MPS mode is enabled.

    • Memory View supports four view modes and a flame graph.

    • The Timeline view improves the display of PPU activity dependencies.

    • Timeline View supports a group display feature that lets you add timeline rows of interest to the Group View and display them separately.

    • Timeline View supports the Device Memory Timeline for analyzing the memory usage of each module. This timeline supports three modes: normal, grouped, and grouped and colored.

    • Timeline View supports a hierarchical view of communication operators.

    • Timeline View displays different kernels in different colors.

    • The Timeline View supports a timeline for CPU heap memory.

    • The time range tooltip now shows the percentage of PPU active/idle time.

    • In Timeline View, hold down the Shift key when selecting a time range to snap to the nearest timeline start or end point.

    • Timeline View supports selecting multiple timeline rows by pressing the Shift or Ctrl key.

    • Optimized the performance of Timeline View to resolve GUI unresponsiveness when opening very large reports.

    • The HGGC API supports a mixed display of C and Python call stacks.

  • New features in Asight Systems v1.6:

    • asys supports trace collection for CPU metrics.

    • The asys analyze subcommand supports specifying a list of Compute Pipes in MPS mode for PPU time utilization analysis.

    • asys supports collecting trace data from multi-node applications launched by the Ray framework, and a report is generated for each server.

    • asys supports collecting trace data from multi-node applications launched by mpirun, generating one report for each server.

    • asys supports collecting trace data for HGGC stream memory operations.

    • The asys stats subcommand supports filtering the HGTX PPU Projection Trace / Summary by HGTX range.

    • The HGTX PPU Projection Summary of the asys stats subcommand outputs the time percentage and total time of HGTX projection.

    • The asys stats subcommand supports filtering by HGTX range for the HGTX Range Kernel Trace / Summary.

    • The asys stats subcommand's HGTX Range Kernel Trace supports exporting HGGC Graph information.

    • The asys stats / analyze subcommand supports specifying the output precision for ratio data.

    • The asys stats subcommand supports analyzing the asynchrony between PCCL communication kernels and exporting trace and summary data.

    • asys supports projecting the HGTX range during the HGGC graph capture phase to the corresponding activity of the PPU-side HGGC graph node.

    • ASYS supports event-based control to start and stop a capture range multiple times. All traces are saved to a single report.

    • asys lets you specify PPU device IDs to trace only the processes that use those devices.

    • Timeline View supports local options, which let you hide rows you are not interested in and customize the report's display.

    • The Timeline View now groups and displays kernel nodes by kernel name.

    • Added global tips to Timeline View to show shortcut information.

    • Calculates the time percentage for PCCL separately in the time range tooltip of Timeline View.

    • The CPU timeline colors threads by name.

    • The HGGC PPU Kernel Summary rule automatically sums the percentages for the Time and Total Time columns.

    • Added PCCL Desynchronization Summary / Trace rules to the statistics system to analyze desynchronization between PCCL kernels.

    • Bookmarks supports import/export and load/save.

    • The statistical and expert systems support searching and filtering tables.

• Asight Compute is a kernel performance analysis tool. It collects PPU hardware performance counters and combines them into metrics. The GUI presents these metrics from various dimensions to help you analyze and optimize kernels in depth. For details, see Asight Compute Kernel Analyzer.

• New features in Asight Compute v1.3:

  • The Metric Details Widget supports displaying a list of metric instances.

  • The Raw Page and Summary Page support selecting the display format for multi-instance metrics. The selection mode is changed from row-based to cell-based selection.

  • Adds an ICN link throughput table.

  • acu supports the --clock-control option.

• New features in Asight Compute v1.4:

  • Adds topology diagram display for 16-card and 8-card Zhenwu 810E configurations.

  • The Source Page now supports Source Marker and can collect and display kernel assembly instruction execution information, including Instructions Executed and Thread Instructions Executed.

  • Improves metric accuracy and enhances stability.

• New features in Asight Compute v1.5:

  • The Memory Chart in the Details Page supports display by transfer size or throughput.

  • The tooltip for connection links in the Details Page Memory Chart now displays link utilization.

  • Tooltips on the Details Page can be pinned. After a tooltip is pinned, its text can be selected and copied.

  • Added Stack Size Per Thread to Launch Statistics on the Details Page.

  • Added Driver SharedMemory Per Block to Launch Statistics on the Details page.

  • The Baseline button layout is updated to show what each button does.

  • The Source Page supports jumping from branch instructions and highlighting all search results.

  • Source Page enhances source code resolution by automatically resolving other files in the same directory structure.

• New features in Asight Compute v1.6:

  • The Source Page indicates whether the source code is imported, its import source, and how to collect line information.

  • You can view not issued stall reasons on the Source Page and the Details Page.

  • The Source Page provides a Source Lookup button and a "Remember import directory" option.

  • The Source Page allows you to click the file not found message to open the source code import window.

  • The Source Page supports syntax highlighting for Python and Pasm.

  • The Source page supports table header tooltips.

  • The Source Page lists functions in ascending order by address.

  • The Source Page displays the source code included with the report.

  • The Metric Details window sorts the searched metrics.

1.5.1 KMD compatibility

Version 1.6 is backward-compatible with the kmd and mcu_fw components from versions 1.5 and 1.4.

1.5.2 Firmware compatibility

Zhenwu 810E requires mcu_fw version 1.2.1 or later.

1.5.3 SDK compatibility

SDK v1.6 maintains backward compatibility with SDK v1.5 for APIs, device binary formats, and library files. However, like v1.5, this version is not backward-compatible with SDK v1.4. The following sections describe these breaking changes.

SDK v1.5 introduced four changes to files, APIs, and the compilation environment. These changes, also present in v1.6, can cause incompatibilities when you mix components from different SDK versions. The changes are as follows:

• The SDK no longer includes the libgomp.so and libomp.so library files. It now uses the versions from your host operating system and host compiler, such as GCC or Clang.

  This change may cause applications built with older SDKs to fail when running in a v1.5 or v1.6 environment, producing a "missing shared library" error.

• Compiler options with the -alippu-xxx prefix now use the -ppu-xxx prefix.

  Because these options are primarily used in custom compilation scenarios, this change may cause compilation errors when compiling with source code or running JIT processes from different SDK versions.

• Several PTX extension instruction prefixes have changed:

  1. alippu.mma.xxx changes to ppu.mma.xxx.

  2. alippu.ldmatrix.xxx changes to ppu.ldmatrix.xxx.

  3. cp.async.aiu.xxx changes to ppu.cp.async.aiu.xxx.

• The custom data type __ali_bfloat16 in SDK header files is now __ppu_bfloat16.

The last three changes can cause build failures in some open-source PPU libraries, such as vllm, cutlass, flash-attn, and flashinfer. You must use library versions that are updated for these v1.5 changes.

In summary, these four changes can cause compilation and runtime issues if you do not fully update your source code and runtime components. These potential incompatibilities have been confirmed by internal SDK compatibility tests. To avoid these problems, we recommend using the complete v1.5 or v1.6 SDK for your build and runtime environments.

1.5.4 Asight file compatibility

Asight Systems/Compute v1.6 is compatible with v1.5 report files.

2.3.1 Supported open source frameworks and libraries

Notes:

• PyTorch open source support:

  • PyTorch versions 2.1 and earlier are based on the corresponding NGC releases.

  • PyTorch versions 2.1.2 and later are based on their corresponding open source community releases.

• TensorFlow open source support:

  • TensorFlow 1.12 from the Google open source community supports only CUDA 9, and version 1.15 supports only CUDA 10. https://www.tensorflow.org/install/source?hl=en#gpu_support_3

    Our release of TensorFlow 1.15 is based on the NVIDIA NGC nv22.04 release. https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html#unique_1997996242

  • Our release of TensorFlow 1.12 is based on PAI TF 1.12.

  • Our release of TensorFlow 2.4 is based on NGC nv21.02.

  • Our releases of TensorFlow 2.6 and 2.7 are based on Google's official community releases.

  • Our release of TensorFlow 2.8 is based on NGC nv22.04.

  • Our releases of TensorFlow 2.10 and later are based on Google's official community releases.

• Items marked with an asterisk (*), such as FlashAttention(*) and cutlass(*), are based on their open source community versions. Our support for these items covers functionality but not performance optimization.

• Most other open source frameworks and libraries are based on their community releases, with some exceptions based on NGC releases. See the user guide for each item for more details.

• The PPU SDK ensures that all listed open source frameworks and libraries compile correctly, provide basic functionality, and pass unit tests. However, due to resource constraints, some issues found during testing remain unresolved in the v1.5 release and are documented in the Known Issues section.

2.3.2 Open-source framework compatibility