View and modify the CPU topology of an ECS instance-Elastic Compute Service(ECS)-阿里云帮助中心

You can view and modify the CPU topology of an ECS instance to improve performance, increase parallelism, and optimize resource allocation in scenarios such as virtualized environments, multi-threaded programming, and high-performance computing. This topic describes how to view and modify the CPU topology of an instance by using OpenAPI.

Background information

CPU topology

The CPU topology defines how physical cores and logical cores are interconnected within a multi-core processor. Typically, each physical core contains one or more logical cores, and the physical cores are connected by a bus or an interconnect network. Different topologies directly affect the processor's performance and power efficiency.

Some Alibaba Cloud instance families support two CPU topology types: HT continuous CPU topology (ContinuousCoreToHTMapping) and HT discrete CPU topology (DiscreteCoreToHTMapping).

HT continuous CPU topology: Logical cores are assigned to physical cores sequentially. This arrangement helps reduce communication and contention between threads. This topology is suitable for applications that are sensitive to memory access and core computation, such as scientific computing, data analysis, and high-performance computing. These applications benefit from lower memory access latency and close core proximity.
HT discrete CPU topology: Logical cores are distributed non-sequentially across physical cores. This reduces resource contention in a multi-threaded environment and provides better performance isolation. It is suitable for workloads where tasks assigned to each thread are relatively independent, or for scenarios that demand high single-thread performance.

Note

This topic uses an 8-vCPU instance from an x86-based instance family to illustrate the two CPU topology types.

The following figures illustrate the two CPU topology types.

HT continuous topology

The following list shows the relationship between logical cores and physical cores:

HT 0 and HT 1 belong to CORE 0.
HT 2 and HT 3 belong to CORE 1.
HT 4 and HT 5 belong to CORE 2.
HT 6 and HT 7 belong to CORE 3.

HT discrete topology

The following list shows the relationship between logical cores and physical cores:

HT 0 and HT 4 belong to CORE 0.
HT 1 and HT 5 belong to CORE 1.
HT 2 and HT 6 belong to CORE 2.
HT 3 and HT 7 belong to CORE 3.

Limitations

You can modify the CPU topology only for instances that belong to the following instance families:

ecs.g9i, ecs.c9i, ecs.r9i
ecs.hfg9i, ecs.hfc9i, ecs.hfr9i
ecs.g8i, ecs.c8i, ecs.r8i
ecs.g7, ecs.c7, ecs.r7
ecs.g7a, ecs.c7a, ecs.r7a
ecs.hfg8i, ecs.hfc8i, ecs.hfr8i
ecs.hfg7, ecs.hfc7, ecs.hfr7
ecs.g6, ecs.c6, ecs.r6
ecs.g6e, ecs.c6e, ecs.r6e

For more information, see Instance families.

View CPU topology

To view the CPU topology of an instance, call the DescribeInstances operation with the AdditionalAttributes request parameter. For more information, see DescribeInstances.

The following values may be returned:

HT continuous CPU topology: ContinuousCoreToHTMapping
HT discrete CPU topology: DiscreteCoreToHTMapping
If the parameter is empty, the CPU topology cannot be modified.

Modify CPU topology

Important

Before modifying the CPU topology, run benchmark tests and performance evaluations to determine the optimal mode for your workload.

When you create an instance
Call the RunInstances operation and set the CpuOptions.TopologyType parameter. For more information, see RunInstances.
For an existing instance
Note
Before you call an API operation to modify the CPU topology of an ECS instance, make sure that the instance is in the Stopped state.
Call the ModifyInstanceAttribute operation and set the CpuOptions.TopologyType parameter. For more information, see ModifyInstanceAttribute.

The CpuOptions.TopologyType parameter accepts the following values:

HT continuous CPU topology: ContinuousCoreToHTMapping
HT discrete CPU topology: DiscreteCoreToHTMapping